MegaChips Unveils USB Type-C Switching Retimer Supporting USB 3.1 Gen2 and DisplayPort 1.4
MegaChips Corporation today announced sampling of MCDP60x0, the latest addition to its DisplayPort (DP)/USB Type-C products portfolio. The new switching retimer chip enables DP Alt-Mode operation with best-in-class signal switching and conditioning for faster data and audio-video signal transfer through a USB Type-C connector. The new device is ideal for high-bandwidth USB Type-C applications on Notebooks, PCs, gaming consoles and Smart mobile devices.
As the adoption of USB Type-C connectors with DP Alt-Mode support is rapidly increasing in PC, wireless and consumer devices, a good quality USB Type-C switch and a retimer become essential inside the host system to guarantee the highest level of signal conditioning irrespective of trace length and a cable plug orientation. The MCDP60x0 combines the DP Alt-Mode switching and the retiming function in a single device for both USB3.1 Gen2 10 Gbits /sec data rates and DP 8.1 Gbits/sec link rates. DP Alt-Mode enables either simultaneous connectivity for 10Gbps data transfer and 4K60Hz/120Hz display or 8K30Hz/60Hz display over a USB Type-C connector.
"The higher demands that are placed on new generation Smart Mobile devices and consumer gadgets such as AR/VR headsets for faster and larger content transfer have driven the bandwidth to new levels," said Alan Kobayashi, Fellow and GM of the DP Technology Group at MegaChips and Chairman of VESA. "To maximize performance and the user experience flexibility, it is necessary to recondition the high-speed signals, and switching retimers are critical in solving the signal integrity (SI) challenges in these systems. As a leading contributor to the USB and DP ecosystems and leveraging its deep insight into the system level SI challenges, MegaChips has developed MCDP60x0 with unique techniques to enhance the performance in an unprecedented fashion."
The MCDP60x0 supports Separate Reference clock Independent SSC (SRIS) for Gen2 bit rate and Bit-Level retimer (BLR) for Gen1 bit rate of 5 Gbits/sec compliant with the latest update to the USB 3.1 standard. The DP retimer implements AUX_CH snooping function as well as the Link Training-tunable PHY Repeater (LTTPR) as defined in the DP1.4 standard. It also supports Intel's DCI (Direct Connect Interface) for in-system debugging through the USB-C port.
The new switching retimer chip enables performance and power consumption optimization based on the PCB design with:
- Bi-directional high-speed transmitter/receiver pins to support flip-ability of a USB Type-C
- Receiver with self-adaptive equalizer using extensive monitoring of the signal integrity of the
link and clock-to-data recovery circuit with high jitter tolerance
- Fully adjustable transmitter compliant with USB 3.1 and DP ver. 1.4 specifications.
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